Last Modified: March 09, 1999


K-Class Front Panel Display Codes


Contents


What do the front panel display codes mean?

This page lists PDC Chassis Codes and Error Codes displayed on the system console and on the front panel LCD display located on the SPU cabinet for models Kxxx.  Each code consists of four hex digits: D0, D1, D2, D3.  "D0" is the Major Code category.

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Major Code 0: (not used)

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Major Code 1: Interrupts

Ostat

Code

Description
Where x=Processor Memory bus slot number
*Should not happen in PDC code.

FLT 1x01 HPMC
FLT 1x02 *PowerFail Interrupt (UNUSED)
FLT 1x03 *Recovery counter trap
FLT 1x04 External interrupt
FLT 1x05 LPMC
FLT 1x06 *ITLB page fault
FLT 1x07 *Instruction memory protection trap
FLT 1x08 Illegal instruction trap
FLT 1x09 Break instruction trap
FLT 1x0A *Privileged instruction trap
FLT 1x0B *Privileged register trap
FLT 1x0C *Overflow trap
FLT 1x0D *Conditional trap
FLT 1x0E Assist exception trap
FLT 1x0F *DTLB miss/page fault
FLT 1x10 *Non-access ITLB fault
FLT 1x11 *Non-access DTLB/page fault
FLT 1x12 *Data memory protection trap or unaligned data reference trap
FLT 1x13 *Data memory break trap
FLT 1x14 *TLB dirty bit trap
FLT 1x15 *Page reference trap
FLT 1x16 *Assist emulation trap
FLT 1x17 *Higher-privilege transfer trap
FLT 1x18 *Lower-privilege transfer trap
FLT 1x19 *Taken branch trap
FLT 1x1A Data memory access rights trap
FLT 1x1B Data memory protection ID trap
FLT 1x1C Unaligned data reference trap

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Major Code 1: Selftests and Diagnostics (CPU/TLB)

Ostat

Code

Description
Where x = CPU number

TEST 1x30 Starting early selftest
WARN 1x31 Early selftest skipped
FLT 1x32 Bad CPU test mode
INIT 1x3C Initialize the CPU
TEST 1x3E Exiting early selftest
FLT 1x3F Cache load fault
TEST 1x40 Starting CPU basic selftest
FLT 1x40 - 1x48 CPU basic selftest failure
TEST 1x49 Starting CPU ALU selftest
FLT 1x49 - 1x50 CPU ALU selftest failure
TEST 1x51 Starting CPU branch selftest
FLT 1x51 - 1x58 CPU branch selftest failure
TEST 1x59 Starting CPU side effect selftest
FLT 1x59 - 1x5A CPU side effect selftest failure
WARN 1x61 Starting CPU carry/borrow selftest
FLT 1x61 - 1x66 CPU carry/borrow selftest fault
TEST 1x67 Starting CPU arithmetic condition selftest
FLT 1x67 - 1x75 CPU arithmetic condition selftest fault
TEST 1x76 Starting CPU bit operation selftest
FLT 1x76 - 1x77 CPU bit operation selftest fault
TEST 1x78 CPU SAR selftest
FLT 1x78 - 1x79 CPU SAR selftest fault
TEST 1x7A Starting CPU extract/deposit selftest
FLT 1x7A - 1x80 CPU extract/deposit selftest fault
TEST 1x81 Starting CPU branch on bit selftest
FLT 1x81 - 1x83 CPU branch on bit selftest fault
TEST 1x84 Starting CPU control register selftest
FLT 1x84 - 1x89 CPU control register selftest fault
TEST 1x8B Starting CPU external interrupt selftest
FLT 1x8B - 1x8D CPU external interrupt selftest fault
TEST 1x8E Starting CPU interval time selftest
FLT 1x8E - 1x93 CPU interval time selftest fault
TEST 1x94 Starting CPU shadow register selftest
FLT 1x94 - 1x97 CPU shadow register selftest fault
TEST 1x98 Starting CPU diagnostics register selftest
FLT 1x98 - 1x99 CPU diagnostics register fault
TEST 1xA0 Starting Coprocessor selftest
TEST 1xA1 Starting Coprocessor Register selftest
FLT 1xA1 Coprocessor register fault
TEST 1xA2 Starting Coprocessor instruction selftest
FLT 1xA2 Coprocessor instruction fault
TEST 1xA3 Starting Coprocessor traps selftest
FLT 1xA3 Coprocessor traps fault
TEST 1xA4 Starting Coprocessor misc selftest
FLT 1xA4 Coprocessor misc fault
WARN 1xAF FPUs disabled warning
TEST 1xB0 TLB initialization test
FLT 1xB0 TLB initialization fault

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Major Code 1: Boot Errors (Forward Progress)

Ostat

Code

Description
(Where x = CPU number)

FLT 1xBA Bad Monarch CPU
FLT 1xBC Bad CPU clock speed detected.
FLT 1xBD CPUs not installed in sequential order.
FLT 1xBF Slave CPU halted due to catastrophic boot failure
INIT 1xCA Initializing runway CPU arbitration
FLT 1xCB Mismatched CPU revisions
FLT 1xCC Mismatched cache sizes
WARN 1xCD CPU was deconfigured
FLT 1xCE CPU was sContentsped via PDC_PROC call
FLT 1xCF Slave halted itself when selftest status <0
WARN 1xDy Monarch (x) deconfigured slave (y)
FLT 1xDF Monarch failed dual-issue test
WARN 1xEF Selftest returned a warning
WARN 1xFy Monarch (x) sContentsped a non-responding slave (y)
INIT 1xFC Synchronizing CPUs
FLT 1xFF Monarch Selftest returned a failure

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Major Code 2: Cache (Selftests and Diagnostics) Codes

Ostat

Code

Description (Where x = CPU number)

TEST 2x00 Starting instruction cache address line selftest
FLT 2x01 - 2x03 Instruction cache address line fault
TEST 2x10 Starting instruction cache data line selftest
FLT 2x11 - 2x12 Instruction cache data line fault
TEST 2x20 Starting instruction cache RAM selftest
FLT 2x21 - 2x23 Instruction cache RAM fault
TEST 2x30 Starting instruction cache tag selftest
FLT 2x31 - 2x33 Instruction cache tag fault
TEST 2040 Starting cache ierr selftest
FLT 2x41-2x43 Cache ierr fault
TEST 2x50 Starting data cache address line selftest
FLT 2x51 - 2x53 Data cache address line fault
TEST 2x60 Starting data cache data line selftest
FLT 2x61 - 2x62 Data cache data line fault
TEST 2x70 Starting data cache RAM selftest
FLT 2x71 - 2x73 Data cache RAM fault
TEST 2x80 Starting data cache tag selftest
FLT 2x81 - 2x83 Data cache tag fault
TEST 2x90 Starting Cache derr selftest
FLT 2x91-2x93 Cache derr fault
TEST 2xA0 Starting PM cache selftest
FLT 2xA0 PM cache selftest fault
TEST 2xA1 Starting PM cache RAM selftest
FLT 2xA1-2xA2 PM cache RAM selftest fault
TEST 2xA3 Starting PM cache pointer selftest
FLT 2xA3-2xA6 PM pointer selftest failure
TEST 2xA7 Starting PM cache CAM selftest
FLT 2xA7-2xA8 PM CAM selftest failure

The following codes are used by HPMC processing.
In PIM logs, the second digit will always be 0 (i.e. 20B0), but on the Hex Display or AP, they will log the CPU number as the second digit (i.e. 22B0 for proc 2).

FLT 20B0 DCache parity error
FLT 20B1 DCache parity error in tag
FLT 20B2 DCache parity error in word 0
FLT 20B3 DCache parity error in word 1
FLT 20C0 Icache parity error
FLT 20C1 Icache tag parity error
FLT 20C2 Icache word0 parity error
FLT 20C3 Icache word1 parity error

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Major Code 3: Processor Dependent Hardware (PDH) Codes

Ostat

Code

Description (Where x = Processor Memory bus slot number)

TEST 3x00 Start checksuming the FEPROM
FLT 3x00 FEPROM checksum failure
INIT 3x00 FEPROM checksum correct
TEST 3x01 Testing PDH control register
INIT 3x01 Initialize the PDH control register
FLT 3x01 PDH control register failure
TEST 3x02 Scratch RAM under test
INIT 3x02 Scratch RAM successfully initialized
FLT 3x02 Fatal fault in scratch RAM
WARN 3x03 Error reading stable storage, contents are invalid
FLT 3x03 Fault reading stable storage and no console present
WARN 3x04 Error writing to the EEPROM
FLT 3x04 Fatal fault writing to the EEPROM
FLT 3x05 Write limit exceeded
WARN 3x06 Error reading EEPROM
FLT 3x06 Fatal fault reading EEPROM
INIT 3x07 Entering LDB
FLT 3x08 Invalid system board byte
FLT 3x09 Invalid system mode byte
FLT 3x0A Invalid system MFG test byte
WARN 3x1A System Hversion in stable storage does not match the hardware
INIT 30C4 Clearing and revalidating EEPROM
FLT 30F4 Number of boots exceeded 95,000

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Major Code 4: Late Selftests

Ostat

Code

Description (Where x = CPU number)

TEST 4x00 Starting late selftest
WARN 4x01 Skipping late selftest
TEST 4x0E Exiting late selftest
TEST 4010 Starting PM cache byte selftest
FLT 4x10 PM cache byte selftest fault
TEST 4x20 Starting data cache byte selftest
FLT 4x20 - 4x27 Data cache byte selftest fault
TEST 4x30 Starting PM cache flush selftest
FLT 4x30 PM cache flush selftest fault
TEST 4x40 Starting data cache flush selftest
FLT 4x40 - 4x47 Data cache flush selftest fault
TEST 4x50 Starting Instruction cache miss selftest
FLT 4x51 Instruction cache miss selftest fault
TEST 4x60 Starting Data cache miss selftest
WARN 4x60 Data cache miss selftest warning
FLT 4x60 - 4x66 Data cache miss selftest fault
TEST 4x70 Starting dual issue selftest
FLT 4x71 Dual issue selftest fault

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Major Code 5: Bus Transactions

Ostat

Code

Description (Where x = slot number and y = bus number)

FLT 5xy0 Unknown bus fault
FLT 5xy1 I/O module internal fault
FLT 5xy2 Assertion of path fault detected
FLT 5xy3 Mode phase fault
FLT 5xy4 Data parity fault
FLT 5xy5 Bus protocol fault
FLT 5xy6 Failure to assert path slave ACK
FLT 5xy7 Processor Memory bus directed fault
FLT 5xy8 Processor Memory bus broad fault
FLT 5xy9 Improper access fault
FLT 5xyA Illegal response
FLT 5xyB Bus time-out
FLT 5xyD HSC module failed to release the bus (one of the HSC guests hung the HSC bus and failed to get off the bus, even when the I/O Adapter asserted error L)
FLT 5xyE HP-PB to GSC bus adapter TOC error
FLT 5xyF TLB fault in the I/O adapter or invalid PDIR entry

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Major Code 6: Reserved (not used)

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Major Code 7: Memory Subsystem Codes

Ostat

Code

Description

FLT 7000 HPMC in the memory system
FLT 7001 Icache parity fault in memory test
FLT 7002 DCache parity fault in memory test
FLT 7003 MSI read time-out (usually caused by reading beyond the end of memory)
FLT 7004 MSI write time-out (usually caused by writing beyond the end of memory)
FLT 7005 Processor/Memory bus parity fault
FLT 7006 Write bomb fault (Processor/Memory bus parity detected on incoming data)
FLT 7007 Memory address ECC fault (Suspect memory carrier or controller first - probably not SIMMs)
FLT 7008 Multi-bit memory fault
FLT 7009 Single bit memory fault
FLT 70FF Unknown HPMC
FLT 7FFF Catastrophic memory fault
FLT 7101 Master Memory Controller not responding
FLT 7102 Master Memory Controller not ready fault
FLT 7103 Master Memory Controller failed to clear
FLT 7104 Master Memory Controller sticky bits
FLT 7105 Master Memory Controller bad revision
FLT 7106 Master Memory Controller register selftest fault
FLT 7107 Master Memory Controller fault in ECC test
FLT 7200 No Slave Memory Controller available
FLT 721x Slave Memory Controller failed
FLT 722x Bad Slave Memory Controller revision
FLT 723x Slave Memory Controller failed to respond
FLT 7301 SIMM 0 bytes are not equal
FLT 7302 SIMM 1 bytes are not equal
FLT 7303 SIMM 0 data and SIMM 1 data have a mismatch error
FLT 7304 Unknown sizing compare fault
FLT 7305 Multi-bit error occurred during sizing
FLT 7306 Address test failed on memory bank
FLT 7307 ECC test failed on memory bank
FLT 7308 Single bit memory error caused HPMC
FLT 7401 No memory SIMMs installed
FLT 7402 Both EDO and STD memory SIMMs installed
FLT 7403 Address did not map to bank
FLT 7404 Address did not map to Group Configuration Table
FLT 7405 Dual issue test failed
FLT 7500 No RAM found
FLT 7501 Not enough good memory to run Operating System
FLT 7502 Not enough good memory to run Boot Console Handler
FLT 7604 No bits set in memory test status
WARN 7701 Using alternate memory configuration
WARN 7702 Memory not tested, initialized only
WARN 7703 SIMM loading warning
WARN 7704 RAM bus warning
WARN 7705 Good memory required to run Operating System is greater than memory size
WARN 770F Rev 1 Slave Memory Controller search routine being used
WARN 7800 PDT disabled warning
FLT 7800 PDT disabled halt
WARN 7801 Overwrite single bit error with multi-bit error in Page Deallocation Table
WARN 7802 Duplicate Page Deallocation Table entry
WARN 7803 EEPROM fault while updating Page Deallocation Table
WARN 7804 Page Deallocation Table is full
FLT 7D03 MSI read time-out (HPMC, caused by accessing beyond the end of memory or non-responding Slave Memory Controllers)
FLT 7D04 MSI write time-out (HPMC, caused by accessing beyond the end of memory or non-responding Slave Memory Controllers)
FLT 7D05 Processor Memory bus parity fault (HPMC)
FLT 7D06 Write bomb fault (HPMC, earlier write transaction to memory had a bus parity error)
FLT 7D07 Memory address fault (HPMC)
FLT 7D08 Multi-bit memory fault (HPMC)
FLT 7D09 Single bit memory fault (HPMC)
FLT 7D0A Address did not map to bank (HPMC)
FLT 7Fxy x = memory carrier card number, y = SIMM pair number

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Major Code 8: I/O Device Fault Codes for K100/K200/K400

Ostat

Code

Description

On the following 3 IOA tests; x=0 means IOA 0; x=1 means IOA 1

FLT 8x00 Error in IOA RAM Test
FLT 8x01 Error in IOA TLB Test
FLT 8x02 Error in IOA DMA Test
WARN 80F3 PDC IODC failed to retrieve header information
WARN 80F4 PDC IODC failed to return Entry Init
WARN 80F5 Error executing Entry Init
WARN 80F6 PDC IODC failed to return Entry I/O
WARN 80F7 Error executing Entry IO
WARN 80F8 Invalid device class, must be sequential, random, or tftp
WARN 80F9 PDC IODC failed to return Entry Test
WARN 80FA Error executing Entry Test
WARN 80FC Invalid device (internal PDC structure error)
FLT 802B I/O bus overlap (usually due to graphics configuration violation)
FLT 803D To many graphics responding to the same address
WARN 8FFF Late I/O selftest warning
FLT 8FFF Late I/O selftest failure.
x = GBOA Slot number; y=GSC+ bus number
TEST 8xy0 Begin HP-PB to GSC Bus adapter (GBOA) register tests
FLT 8xy1-8xy4 Failures of HP-PB to GSC Bus adapter(GBOA) register tests
TEST 8xy5 Begin HP-PB to GSC Bus adapter (GBOA) DMA tests
FLT 8xy6-8xyB Failures of HP-PB to GSC Bus adapter (GBOA) DMA tests
INIT 8300 Begin MFIOC (LASI) tests
FLT 8301 Failed LASI LAN test
FLT 8302 Failed LASI KEYBOARD TEST
FLT 8303/8305 Failed other LASI tests

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Major Code 9: Console Initialization Errors

Ostat

Code

Description

WARN 9000 Stable storage console not found
WARN 9001 Alternate console(s) not found

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Major Code A: Boot Device Initialization Errors

Ostat

Code

Description

FLT A088 No console found, unable to boot
WARN A008 No bootable device found
WARN A50F Initialize primary path failed boot
WARN A70F Initialize other boot path failed
WARN A00F Retrieve path failed
WARN A0BD Entry Initialization returned a -8, device not ready
FLT A0FF Unknown launch fault (control returned from IPL)

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Major Code B: HP-UX System Panic Codes

Code

Description

B000 Kernel panic
B009 Panic dump completed (disks not fully synchronized)
B00A Panic dump completed (disks fully synchronized)

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Major Code C: System Initialization Codes

Ostat

Code

Description

INIT C10x Starting the monarch processor selection, where x = CPU number
INIT C200 Starting memory configuration
INIT C201 Starting the destructive memory initialization
INIT C202 Starting the non-destructive memory initialization
INIT C20F RAM configuration forward progress indicator
TEST C210 Memory hard reset
TEST C220 Physical configuring memory
TEST C230 Sizing memory banks
TEST C240 Loading memory configuration from EEPROM
TEST C250 Configuring memory interleave
TEST C260 Testing memory interleave
TEST C261 Testing first page of memory
TEST C262 Testing dual issue
TEST C263 Testing memory, write test
TEST C264 Testing memory, read/write test
TEST C265 Testing memory, read test
TEST C270 Updating memory configuration
TEST C280 Configure to EEPROM
TEST C2E0 Memory testing done
TEST C2A0 Flat configuration test
TEST C2B0 Flat RAM test
TEST C2C1 Memory soft reset
TEST C2C2 A non destructive RAM test
INIT C300 Monarch is executing extended selftests
INIT C30C Monarch slave check, making sure slaves responded
TEST C3EE Internal slave test complete
TEST C3FF Late monarch I/O test OK
INIT C400 Retrieving the stable storage console path
INIT C40A Retrieving special console path
INIT C440 Initializing the stable storage console path
INIT C44A Initializing special console path
INIT C4CC Initialize close console
INIT C4CD Close console not found
INIT C4CF Found the close console
INIT C500 Retrieving the primary boot path from stable storage
INIT C540 Initialize primary path
INIT C550 Execute entry test for primary boot path
INIT C580 Load IPL primary path
WARN C5F0 Primary IPL warning
FLT C5F0 Primary IPL fault and no console found
WARN C5F1 LIF file address is nor 2K bytes aligned or it is zero
WARN C5F2 LIF not present on media
WARN C5F3 LIF file is not a multiple of 2K bytes, is zero, or is greater than 256K bytes
WARN C5F4 LIF file entry point is not word aligned or is greater than or equal to the size
WARN C5F8 The arithmetic sum of the words in IPL mismatch 0
INIT C5FF Branching to IPL on primary boot device
INIT C600 Retrieving default console path
INIT C601 Retrieving graphics console path
INIT C602 Retrieving keyboard console path
INIT C640 Initializing default console path
INIT C641 Initializing graphics console path
INIT C642 Initializing keyboard console path
INIT C700 Get manufacturing defaults
INIT C740 Initialize a non-primary boot path
INIT C750 Execute entry test for a non-primary boot path
INIT C780 Loading IPL from a non-primary boot path
INIT C7F0 An error occurred reading IPL
INIT C7F1 LIF file address is not 2K byte aligned or it is zero
INIT C7F2 LIF file not present on media
INIT C7F3 LIF file is not a multiple of 2K bytes, is zero, or is greater than 256K bytes
INIT C7F4 LIF file entry point is not word aligned or is greater than or equal to the size
INIT C7F8 The arithmetic sum of the words in IPL mismatch 0
INIT C7FF Branching to IPL from a non-primary boot device
INIT CB00 Transfer of Control (TOC) initiated by the firmware
WARN CB01 No Operating System TOC vector found
WARN CB02 Invalid OS TOC vector
WARN CB03 Invalid OS TOC code
WARN CB04 Invalid OS TOC code length
WARN CB05 Invalid checksum for OS TOC code
WARN CB09 Seed error TOC entered
WARN CB0A Previous TOC PIM logged, current TOC PIM data is lost
INIT CB0B Branching to OS TOC handler
INIT CB0C Branch to OS TOC failed
FLT CB10 TOC_IN_PROGRESS (Displayed by OS_TOC, not PDC)
INIT CB1B Branching to OS_LPMC handler
WARN CB15 Central bus LPMC error
WARN CB19 Seed Error LPMC entered
INIT CB1F Branching to OS LPMC returned
FLT CB99 PDC_SEED_ERROR IVA table, HPMC handler entered
FLT CB9A HPMC PIM overwritten
FLT CBF0 HPMC handling initiated
FLT CBF1 OS did not replace PDC IVA
FLT CBF2 Invalid length for OS HPMC code
FLT CBF3 Invalid address for OS HPMC code
FLT CBF4 Invalid checksum for OS HPMC code
FLT CBF5 IVA + 32 was equal to zero
INIT CBF7 PDC_IO initialization started
INIT CBF8 PDC_IO initialization completed
WARN CBF9 PDCE_HPMC or PDC_IO found unconfigured IOA or bus converter
WARN CBFA Previous HPMC PIM logged, current HPMC can not be logged
FLT CBFB Branching to the OS HPMC handler
FLT CBFC Branch to OS HPMC failed
FLT CBFE HPMC interrupted a TOC
FLT CBFF Nested HPMC occurred
INIT CC0x Operating System rendezvous, Where x = CPU
INIT CC1x Early CPU rendezvous, Where x = CPU
INIT CC2x CPU rendezvous, Where x = CPU
INIT CC3x Cache CPU rendezvous, Where x = CPU
INIT CC4x Memory CPU rendezvous, Where x = CPU
FLT CCF0 CPU slave fault
TEST CD00 I/O Adapter test
INIT CD08 Initialize I/O Adapter 0
INIT CD0A Initialize I/O Adapter 1
FLT CD0A IOA 1 did not respond
INIT CD0F Initialize MMC
INIT CDEA Initialization of EISA
INIT CDEB Checking for EIAS cards in slots
WARN CDEC No Configuration Data for card in this slot.
WARN CDED ID from card <> IO in EEPROM config data.
FLT CDEF No EISA Found
INIT CDFx Starting initialization of EISA card in slot x.
INIT CDE0 EISA Initialization complete

The following may apply to all system types

INIT CDxy Indicates system found a device and is resetting it; x = bus and y = slot
FLT CDxy Indicates system found a device error; x = bus and y = slot
INIT CDxC Initialize Graphics; x = HSC bus number
INIT CDxD (init hyperdrive) x = GSC+ bus number (graphics hyperdrive/dodger)
INIT CDxF (init lasi) x = GSC+ bus number
INIT CDFF Building the system map table

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Major Code C: HP-UX ISL Boot Codes

Code

Description

CEC0 HP-UX boot has been loaded and initialization begun
CED0 HP-UX boot has entered main
CED2 HP-UX boot is about to configure the I/O system
CED4 HP-UX boot is about to mount the root file system
CEDA HP-UX boot is about to list the contents of a directory
CEDB HP-UX boot is about to load the kernel into memory
CEDC HP-UX boot is about to start a copy operation
CEDD HP-UX boot is about to sContents (return to Remote Data Base)
CEDE HP-UX boot is about to return to ISL
CEDF HP-UX boot is about to launch the kernel

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Major Code C: HP-UX System Initialization Codes

Code

Description

CEE0 Kernel was loaded and initialization has begun
CEF0 Kernel has entered main
CEF2 Kernel is about to configure the I/O system
CEF4 Kernel is about to mount the root file system
CEF6 Kernel is about to set up the page-out demon
CEF8 Kernel is about to start the initialization process

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Major Code D: HP-UX System Shutdown Codes (OS)

Code

Description

D000 Shutdown begun, boot () has been entered
D004 Transfer of Control (TOC) core dump begun
D010 High priority machine check (HPMC) core dump begun
D400 Shutdown in progress, returned from update (), about to wait for buffers to be flushed
D600 Shutdown in progress, busy-wait after update () has completed
D900 Shutdown completed, disks not fully synchronized
D904 TOC dump completed, disks not synchronized)
D910 HPMC completed, disks not synchronized
DA00 Shutdown completed, disks fully synchronized

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Major Code E: (not used) Warning Codes (OS)

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Major Code F: HP-UX Run Codes (OS)

Code

Description

FxnF (HP-UX) Indicates the system is running. An F in the first and fourth digits indicates the system is running normally.
The x is updated every five seconds with the length of the run queue at that time (an instantaneous reading not an average). It indicates the number of processes. Loads higher than nine display as A.
The n indicates the number of processors (1 or 2).

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