Mapping FLARE Panic 12

Mapping FLARE Panic "12" Parity Errors to

SIMM Modules on Phoenix and Galaxy SP Boards

Panic "12" parity errors on a SP (Storage Processor) are usually related to failing SIMMs. Identifying the failed SIMM is a complex process.

The following information gives some SP theory of operation and explains how to identify a failing SIMM pair. The Phoenix/Galaxy Storage Processor has 4 SIMM module slots, which may be populated with 4MB and/or 16MB SIMMs. The SIMMs must be installed in pairs. Different size SIMMs are allowed as long as each SIMM of a pair is of the same size. It is also recommended that the larger SIMM pair be placed in the first two slots on the Storage Processor.

If a parity error is detected by the system during normal operation, a panic results. The panic code information may be used to determine which SIMM pair failed. The format of the panic code when a parity error is detected is as follows:

0x00000012, [address]

Where [address] is a hex value that is used to reference the failing SIMM pair: for example 0x00EF9A20.

The four SIMM modules occupy slots XU1, XU2, XU3, and XU4 on the Storage Processor (See Table 1). The XU1 and XU2 SIMM slots are the first pair. The XU3 and XU4 SIMM slots are the second pair. The SIMM module slots are clearly labeled on the Phoenix and Galaxy controller module.

Listed below are the steps used to identify which of the four SIMM locations has failed.

If the system is populated with one pair of SIMMs, both SIMMs should be replaced after receiving this panic.
If the system is populated with two SIMM pairs of different size then the crossover address (See Table 1) is used to identify which SIMM pair has failed. If the address of the parity error is below the crossover address then the larger of the SIMM pairs failed. Otherwise, the smaller of the SIMM pairs failed. NOTE: This only works if the larger SIMM pair is in the first slots, XU1 and XU2.

If the system is populated with two SIMM pairs of the same size, then the crossover address (See Table 1) is used to identify which SIMM pair has failed. If the address of the parity error is below the crossover address, then the failure is in the first pair of SIMMs (slots XU1 and XU2). If the address of the parity error is above the crossover address then the failure is in the second pair of SIMMs (slots XU3 and XU4).

Table 1

SIMMs CONFIGURATION

SIMM Size (MB)				Total Memory	Crossover Address
SIMM Pair		SIMM Pair		Total Memory	Crossover Address
XU1	XU2	XU3	XU4
4	4	-	-	8	-
4	4	4	4	16	0x00800000
16	16	-	-	32	0x02000000
16	16	4	4	40	0x02000000
16	16	16	16	64	0x02000000

Some examples follow:

In a 40MB system populated with one pair of 4MB SIMMs and one pair of 16MB SIMMs the failing address is 0x02345678. This address is above the crossover address of 0x02000000 therefore the 4MB SIMM pair is failing.
In a 64MB system populated with four SIMMs of 16MB each, the failing address is 0x01234567. This address is below the crossover address of 0x02000000, therefore the failing SIMM occupies slot XU1 or XU2.

While all HP Documentation states only cache sizes of 8,16,32 and 64MB are supported, this is because HP does not ship any other cache size as an option. A cache size of 40MB will work so long as the aforementioned guidelines are noted.