<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic EV6 Byte Lane Optimize in Alpha Servers</title>
    <link>https://community.hpe.com/t5/alpha-servers/ev6-byte-lane-optimize/m-p/599207#M136</link>
    <description>I have a DS15 that is doing memory mapped I/O to hardware.  The problem is that unless a memory barrier asm("MB") is issued before and after each access the upper byte lanes are corrupt.  I'm using FORTRAN code.&lt;BR /&gt;
&lt;BR /&gt;
Any thoughts?&lt;BR /&gt;
&lt;BR /&gt;
Thanks</description>
    <pubDate>Thu, 08 Dec 2005 10:03:44 GMT</pubDate>
    <dc:creator>T Gander</dc:creator>
    <dc:date>2005-12-08T10:03:44Z</dc:date>
    <item>
      <title>EV6 Byte Lane Optimize</title>
      <link>https://community.hpe.com/t5/alpha-servers/ev6-byte-lane-optimize/m-p/599207#M136</link>
      <description>I have a DS15 that is doing memory mapped I/O to hardware.  The problem is that unless a memory barrier asm("MB") is issued before and after each access the upper byte lanes are corrupt.  I'm using FORTRAN code.&lt;BR /&gt;
&lt;BR /&gt;
Any thoughts?&lt;BR /&gt;
&lt;BR /&gt;
Thanks</description>
      <pubDate>Thu, 08 Dec 2005 10:03:44 GMT</pubDate>
      <guid>https://community.hpe.com/t5/alpha-servers/ev6-byte-lane-optimize/m-p/599207#M136</guid>
      <dc:creator>T Gander</dc:creator>
      <dc:date>2005-12-08T10:03:44Z</dc:date>
    </item>
  </channel>
</rss>

