topic Re: HP-UX Itanium in Operating System - HP-UX

HP-UX Itanium

vaibsk — Fri, 22 Jan 2010 12:55:23 GMT

Hi,
I have a question on Traps. One of my applications uses lot of system cpu time. From Glance I can see that there are lot of traps the application generates. How can I find out which part of the code is causing the traps ? Is there any tool ? I used tusc, but it doesn't give the trap information. Any idea ?

Thanks,

Re: HP-UX Itanium

Don Morris_1 — Fri, 22 Jan 2010 14:11:43 GMT

I would think Caliper would be a good place to start. http://www.hp.com/go/caliper

Might want to read over http://h21007.www2.hp.com/portal/download/files/unprot/caliper/caliper_5.1/caliper_user_guide.pdf first (searching for "traps" ought to help you narrow down your plan of attack here).

Re: HP-UX Integrity alignment traps

Dennis Handly — Wed, 20 Aug 2014 19:06:28 GMT

Did it say what type of traps?
Typically on HP-UX, one trap and your application aborts.
The traps where are it continues are either:
1) Some type of signals with a handler

2) Denorm traps for very small floating point values. Do you have any floating point?
I had an application where it slowed because of these and we couldn't see gpm's warning about too many traps because we had the window going off the screen to the right. :-(
Linking with +FPD, will cause these to quickly flush to zero. (We thought we did that but only had +FPD at compile time.)

3) Alignment traps. This will kill you too.

As Don says, caliper should help.

Re: HP-UX Itanium

vaibsk — Sat, 30 Jan 2010 13:42:11 GMT

Thanks for your replies.

Unfortunately, the processor I have in my doesn't support the caliper traps :(

sawbuck # caliper traps date
HP Caliper: usage error:
The 'traps' measurement is only supported on Montecito processors.
Run caliper -H for help.

This is the processor information
CPU info:
Number of CPUs = 4
Clock speed = 1000 MHz
Bus speed = 400 MT/s
CPUID registers
vendor information = "GenuineIntel"
processor serial number = 0x0000000000000000
processor version info = 0x000000001f000704
architecture revision: 0
processor family: 31 Intel(R) Itanium 2 Family Processors
processor model: 0 Intel(R) Itanium 2 processor
processor revision: 7 Stepping B3
largest CPUID reg: 4
processor capabilities = 0x0000000000000001
implements long branch: 1
Bus features
implemented = 0xbdf0000060000000
selected = 0x0000000040000000
Bus Lock Signal masked

From vmstat, I see lot of system calls and interrupts. But, tusc doesn't show the total system calls. Would floating point errors cause number of system calls to go up ?

Re: HP-UX Integrity alignment traps

Dennis Handly — Wed, 20 Aug 2014 19:06:03 GMT

>the processor I have in my doesn't support the caliper traps

You probably don't need that to find out what type of traps. You need to get a sampling of where you are spending time in the kernel.

>Would floating point errors cause number of system calls to go up?

Not system calls, faults. See my 2) above.

Re: HP-UX Itanium

vaibsk — Mon, 01 Feb 2010 10:48:48 GMT

Hi Dennis,
In caliper, I see the following vmlinux modules taking more time. Am I hitting any unaligned data accesses ? I heard of a alignment debugger aldbg, but couldn't find any information on that ? How can I find out the code that is causing these unaligned access ?

vmunix::unaligned_get_gr unaligned_emu.c
vmunix::ss_get_rsebs ss_access.c
vmunix::bubbleup
vmunix::pre_hndlr hl_ivt.c
vmunix::post_hndlr hl_ivt.c
vmunix::as_ubcopy
vmunix::int_ldst unaligned_emu.c
vmunix::unaligned_hndlr hl_ivt.c
vmunix::ki_accum_pop_TOS clock_ki.c
vmunix::ki_accum_push_TOS clock_ki.c
vmunix::bubbledown

Re: HP-UX Integrity alignment traps

Dennis Handly — Wed, 20 Aug 2014 19:05:49 GMT

>Am I hitting any unaligned data accesses?
>vmunix::unaligned_get_gr unaligned_emu.c

It sure looks like it.

>How can I find out the code that is causing these unaligned access?

Don't call allow_unaligned_data_access and you'll abort on the first.
Basically if the application is calling that function, it should know (and document) where the aligned accesses are.

Re: HP-UX Integrity alignment traps

Dennis Handly — Wed, 20 Aug 2014 19:12:01 GMT

Have you seen the documentation about misaligned data?

http://h21007.www2.hp.com/portal/download/files/unprot/aCxx/HTML_Online_Help/pragmas.htm#pragma-pack-ex3

Basically there are N ways to handle unaligned data&colon;
1) Abort, default, highest performance.
2) Explicit copy for alignment
3) Using pragma pack, compiler handles multiple loads
4) Using 3) with 6)
5) Using 3) with 7)
6) Using pragma unaligned with types.
7) Using allow_unaligned_data_access
8) Using +un to assume all pointers are unaligned.