topic Re: Makefile Error in Operating System - Linux

Makefile Error

CA1490051 — Tue, 31 Jul 2007 08:21:48 GMT

Hi all,

1)I have written a small C- Program and wtitten the following makefile.

CC = cc
CFLAGS = -o
OBJS = Test.o
TARGET = Test

Test : $(OBJS)
# echo "Hello"
$(CC) -o $@ $+

%.o : Test.c
#echo $+
$(CC) -c $+

clean : Test Test.o
rm Test Test.o

If i run the Makefile i m not able to
get the exe Test.

It says

bash-2.04$ make -f TestMakefile
cc -o -c Test.c
cc: error 1410: Illegal name for output file: "-c".
*** Error exit code 8

I am not understanding what i have missed here.

2)Also i want to write a Makefile wherein i can test the conditions
for ex- if ($Var1)
CC Test.c
else($Var2)
GCC Test.c

I know (please correct me if i m wrong) i cant write the if loops in Makefile .
But, i want to know how can i achieve the above goal in Makefile.

Please suggest some solutions to these problems .

thanks and regards
Vikram

Re: Makefile Error

Dave Hutton — Tue, 31 Jul 2007 08:29:16 GMT

Doesn't -o need to be followed immediately with the output filename? Something like cc -o test -c test.c

Re: Makefile Error

Steven Schweda — Tue, 31 Jul 2007 11:36:41 GMT

> Doesn't -o need to be followed immediately
> with the output filename? [...]

Exactly. Typically, when "cc -c" isn't good
enough, the "make" file will include an
explict rule which includes the "-o" option.
For example, to create both fred.o and
fred_.o from fred.c (using an additional
"-DUTIL" for fred_.o):

.SUFFIXES:
.SUFFIXES: _.o .o .c
.c_.o:
$(CC) -c $(CFLAGS) -DUTIL -o $@ $<

.c.o:
$(CC) -c $(CFLAGS) $<

Re: Makefile Error

MurugesanGCT — Wed, 01 Aug 2007 04:05:26 GMT

sample Makefile
CC can be set in the environment variable

export CC=aCC
or
export CC=cc

[code]
#CC=cc This is commented here.
SOURCE=Test.c
OBJS=$(SOURCE:.c=.o)
BUILD=$(OBJS:.o=)

$(BUILD): $(OBJS)
@[[ "$$CC" != "cc" ]] ; \
echo SOURCE set ; \
echo $(SOURCE) ; \
echo "BUILDING ... " $@
$(CC) $(OBJS) -o Test
$(OBJS): $(SOURCE)
$(CC) +DAportable -c $(SOURCE)
clean:
rm -f $(BUILD) $(OBJS)
[/code]

Re: Makefile Error

Dennis Handly — Wed, 01 Aug 2007 07:10:47 GMT

As Dave and Steven point out, you would never ever have a naked -o in CFLAGS.
Perhaps you have a typo and mean the typically CFLAGS default of -O, for optimization?

>2)Also i want to write a Makefile wherein i can test the conditions

You can only do that in gmake.

>MurugesanGCT: CC can be set in the environment variable

Typically this is not a good practice. It is better if you put it on the make command line:
$ make CC=cc

(And don't even think of using -e. ;-)