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    <title>topic Re: Rx 8640 Npar in Integrity Servers</title>
    <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225335#M3922</link>
    <description>I think you understand the difference between LPMC and HPMC. In most of the cases HPMC will cause system panic and for sure CPU failure is an HPMC.&lt;BR /&gt;&lt;BR /&gt;Have you heard about Single bit errors (SBE) on memory or I-cache/D-cache parity errors on CPU.. These falls under LPMC, but remember multiple LPMCs can cause an HPMC as well...&lt;BR /&gt;&lt;BR /&gt;Dynamic CPU.. I don't think its a term related to NPAR.. It is used in vpars and even there if it fails vpar will panic for sure.&lt;BR /&gt;&lt;BR /&gt;</description>
    <pubDate>Fri, 04 Jul 2008 01:32:11 GMT</pubDate>
    <dc:creator>Mridul Shrivastava</dc:creator>
    <dc:date>2008-07-04T01:32:11Z</dc:date>
    <item>
      <title>Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225328#M3915</link>
      <description>guys some doughts,&lt;BR /&gt;  rx8640,4 cell with 2 IO  chasis is connected to cell 0 and cell 1.we have a npar with cell 0 and cell 1.&lt;BR /&gt;&lt;BR /&gt;SO i have a dought at  that in future, if cell 1 is going down, then we ther I will be able to use the IO chasis which is connected to cell 1 .&lt;BR /&gt;&lt;BR /&gt;And also pls let me know the failure within the cell.which will affect the npar .&lt;BR /&gt;&lt;BR /&gt;Thanks in advance.</description>
      <pubDate>Mon, 30 Jun 2008 19:58:53 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225328#M3915</guid>
      <dc:creator>pa8700</dc:creator>
      <dc:date>2008-06-30T19:58:53Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225329#M3916</link>
      <description>well if cell 1 fails, and you are unabel to use it, any I/O connecfted to that cell also becomes unuseable until you repair/replace the failed cell.&lt;BR /&gt;As for your second question, providing a list of failures in a cell which will affect the npar is not viable.&lt;BR /&gt;</description>
      <pubDate>Tue, 01 Jul 2008 11:22:09 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225329#M3916</guid>
      <dc:creator>melvyn burnard</dc:creator>
      <dc:date>2008-07-01T11:22:09Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225330#M3917</link>
      <description>No My question is like if one procesor is having some probalem, wether it will do an LPMC or HPMC and wether the npar will reboot .like that .I am new to the npars.I will be great full i some body can elabore  on this.&lt;BR /&gt;</description>
      <pubDate>Tue, 01 Jul 2008 21:44:18 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225330#M3917</guid>
      <dc:creator>pa8700</dc:creator>
      <dc:date>2008-07-01T21:44:18Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225331#M3918</link>
      <description>any if one of my cell goes bad, wether I can replace it with one of my other unassigned cell.At the complex conf level any ID is keeping for each cell or only Cell ID( Slot No ) is refering or what ?&lt;BR /&gt;</description>
      <pubDate>Tue, 01 Jul 2008 21:47:05 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225331#M3918</guid>
      <dc:creator>pa8700</dc:creator>
      <dc:date>2008-07-01T21:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225332#M3919</link>
      <description>Hi,&lt;BR /&gt;&lt;BR /&gt;If you have problem with cellboard and you have unassigned cellboard, then yes, you can replace it, to make it even safer, use the same firmware for every cell that you have in a complex&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Sandy</description>
      <pubDate>Thu, 03 Jul 2008 01:32:06 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225332#M3919</guid>
      <dc:creator>Sandy Chen</dc:creator>
      <dc:date>2008-07-03T01:32:06Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225333#M3920</link>
      <description>If a HPMC occurs this will bring down the npar. The handling of problems will depend on the OS release and your configuration.&lt;BR /&gt;hp-ux 11.31 does even support online cell replacements. But in general, a serious hardware problem will affect the npar.</description>
      <pubDate>Thu, 03 Jul 2008 04:38:54 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225333#M3920</guid>
      <dc:creator>Torsten.</dc:creator>
      <dc:date>2008-07-03T04:38:54Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225334#M3921</link>
      <description>ya ya torson u r comming to the way I think.&lt;BR /&gt;Will u pls tell me some situations in 8640 for an LPMC and HPMCs.that was I really looking for.&lt;BR /&gt;And can u also tell me the HP_UX  versions capability to withstand the hard ware faults.Like v3 only uses boot processor for processing interupts so if a dynamic procssor is going bad wether it will cause any LPMC or HPMC in V3.&lt;BR /&gt;&lt;BR /&gt;I will b thank full</description>
      <pubDate>Thu, 03 Jul 2008 22:08:40 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225334#M3921</guid>
      <dc:creator>pa8700</dc:creator>
      <dc:date>2008-07-03T22:08:40Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225335#M3922</link>
      <description>I think you understand the difference between LPMC and HPMC. In most of the cases HPMC will cause system panic and for sure CPU failure is an HPMC.&lt;BR /&gt;&lt;BR /&gt;Have you heard about Single bit errors (SBE) on memory or I-cache/D-cache parity errors on CPU.. These falls under LPMC, but remember multiple LPMCs can cause an HPMC as well...&lt;BR /&gt;&lt;BR /&gt;Dynamic CPU.. I don't think its a term related to NPAR.. It is used in vpars and even there if it fails vpar will panic for sure.&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 04 Jul 2008 01:32:11 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225335#M3922</guid>
      <dc:creator>Mridul Shrivastava</dc:creator>
      <dc:date>2008-07-04T01:32:11Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225336#M3923</link>
      <description>Hello Praveen,&lt;BR /&gt;it's usually a bad design to add cell 0 and cell 1 to an npar, cuz this way u'll never be able to create another npar unless u have an IO expansion and in your case you don't.&lt;BR /&gt;So it's better to have an npar with cell0 and cell2 and another with cell1 and cell4&lt;BR /&gt;&lt;BR /&gt;always put in mind that a cell and it's IO chassis is a one to one relationship. It can not be shared with other cells. you lose the cell you lose the IO chassis.&lt;BR /&gt;&lt;BR /&gt;regarding to the HPMC as everyone mentioned that if a cell is to HPMC say for a processor error the whole partition reboots, very logical i think. &lt;BR /&gt;&lt;BR /&gt;regarding the dynamic partitioning, i advise you to read the white paper on dynamic partitions which is supported on HPUX 11i v3&lt;BR /&gt;&lt;BR /&gt;one last thing put in mind that if a cell fails you will have to take the npartition down as issue "PE off" from the MP and replace the cell then boot it up. unless you are working with dynamic partitioning and that's a different issue of course.  &lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Thu, 17 Jul 2008 08:38:29 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225336#M3923</guid>
      <dc:creator>Sherif A. Louis</dc:creator>
      <dc:date>2008-07-17T08:38:29Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225337#M3924</link>
      <description>I have a  senario here that i have icap of only 2 cells out of four.So if a cell fails , can i power off npar and swap the failed npar with the unused one.&lt;BR /&gt;&lt;BR /&gt;pls reply ,  thanks in advance</description>
      <pubDate>Thu, 17 Jul 2008 13:17:59 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225337#M3924</guid>
      <dc:creator>pa8700</dc:creator>
      <dc:date>2008-07-17T13:17:59Z</dc:date>
    </item>
    <item>
      <title>Re: Rx 8640 Npar</title>
      <link>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225338#M3925</link>
      <description>This may depend on your iCAP configuration. iCAP CPUs are deactivated.</description>
      <pubDate>Thu, 17 Jul 2008 13:23:50 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/rx-8640-npar/m-p/4225338#M3925</guid>
      <dc:creator>Torsten.</dc:creator>
      <dc:date>2008-07-17T13:23:50Z</dc:date>
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