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    <title>topic Re: machinfo output interpretation on rx4640 in Integrity Servers</title>
    <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496144#M5545</link>
    <description>Finally you should have space for 2 more modules in both servers.</description>
    <pubDate>Fri, 18 Sep 2009 11:46:00 GMT</pubDate>
    <dc:creator>Torsten.</dc:creator>
    <dc:date>2009-09-18T11:46:00Z</dc:date>
    <item>
      <title>machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496140#M5541</link>
      <description>Hi. I am slightly confused about correct output interpretation from machinfo on a couple of rx4640 servers. Both are ia64 and HP-UX 11.23.&lt;BR /&gt;&lt;BR /&gt;1. On the first server machinfo shows:&lt;BR /&gt;&lt;BR /&gt;Number of CPUs = 4&lt;BR /&gt;Clock speed = 1600 MHz&lt;BR /&gt;processor family:           32   Intel(R) Itanium 2 9000 series&lt;BR /&gt;processor model:             0   Intel(R) Itanium 2 9000 series&lt;BR /&gt;&lt;BR /&gt;According to &lt;A href="http://docs.hp.com/en/T2767-90180/ch10s03.html#itaniumtable" target="_blank"&gt;http://docs.hp.com/en/T2767-90180/ch10s03.html#itaniumtable&lt;/A&gt; and &lt;A href="http://en.wikipedia.org/wiki/IA-64#Released_processors" target="_blank"&gt;http://en.wikipedia.org/wiki/IA-64#Released_processors&lt;/A&gt; , these are Itanium 2 Montecito dual-core CPUs. And, considering that (as far as I know) machinfo on 11.23 shows cores, we have 2 physical dual-core CPUs on this server and we have space on the board for two more physical CPUs. Is that correct?&lt;BR /&gt;&lt;BR /&gt;2. Machinfo on the second server shows:&lt;BR /&gt;&lt;BR /&gt;Number of CPUs = 4&lt;BR /&gt;Clock speed = 1100 MHz&lt;BR /&gt;processor family:           31   Intel(R) Itanium 2 Family Processors&lt;BR /&gt;processor model:             1   Intel(R) Itanium 2 processor&lt;BR /&gt;&lt;BR /&gt;According to the same sources as above and rx4640 specs, these are Itanium 2 Hondo dual-processor modules (essentially single core, but having two dies per device). Taking into account the same consideration about machinfo output on 11.23 as before, is it correct to conclude, that this server also has space left for two more processor modules?</description>
      <pubDate>Fri, 11 Sep 2009 16:18:04 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496140#M5541</guid>
      <dc:creator>Modris Bremze</dc:creator>
      <dc:date>2009-09-11T16:18:04Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496141#M5542</link>
      <description>Hi,&lt;BR /&gt;&lt;BR /&gt;if you doubt about the physicall number of processors in your system, you can always have a look at the 'DF' output on the command shell of the MP in your system.&lt;BR /&gt;&lt;BR /&gt;Remember there is also the Hyperthreading setting, not sure about the support on UX for it.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;- log into the MP via telnet&lt;BR /&gt;- go to the command shell using the CM &lt;BR /&gt;  command&lt;BR /&gt;- run the DF command, specify S and see how&lt;BR /&gt;  many procesors are listed.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;The below examples is from a RX4640 with 2 Hondo's and the second is from a RX4640 with 4 Montecito's.&lt;BR /&gt;&lt;BR /&gt;This does not answer your MACHINFO question but you could use the above to find the answer of what is installed in your server.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;RX4640 with 2* Hondo:&lt;BR /&gt;---------------------&lt;BR /&gt;&lt;BR /&gt;Display FRU Information Menu:&lt;BR /&gt;     S - Specific FRU&lt;BR /&gt;     A - All available FRUs&lt;BR /&gt;     V - Display Mode: Text&lt;BR /&gt;&lt;BR /&gt;Enter menu item or [Q] to Quit: s&lt;BR /&gt;s&lt;BR /&gt;&lt;BR /&gt;      FRU IDs:&lt;BR /&gt;      --------&lt;BR /&gt;0007-Disk Management&lt;BR /&gt;0008-Disk Backplane&lt;BR /&gt;0032-CPU 0 PIROM&lt;BR /&gt;0033-CPU 1 PIROM&lt;BR /&gt;0036-Processor 0 RAM  0037-Processor 1 RAM&lt;BR /&gt;0001-Mem Extender     0002-Power Converter  0003-Power Supply 0&lt;BR /&gt;0004-Power Supply 1   0005-Diagnostic Panel 0006-Front Panel&lt;BR /&gt;0010-Processor Board  0128-DIMM0A           0129-DIMM2A&lt;BR /&gt;0136-DIMM0B           0137-DIMM2B           0144-DIMM0C&lt;BR /&gt;0145-DIMM2C           0152-DIMM0D           0153-DIMM2D&lt;BR /&gt;0160-DIMM1A           0161-DIMM3A           0168-DIMM1B&lt;BR /&gt;0169-DIMM3B           0176-DIMM1C           0177-DIMM3C&lt;BR /&gt;0184-DIMM1D           0185-DIMM3D           0000-Motherboard&lt;BR /&gt;&lt;BR /&gt;Select FRU ID: 32&lt;BR /&gt;32&lt;BR /&gt;&lt;BR /&gt;FRU info N/AFRU NAME: CPU 0 PIROM ID:20&lt;BR /&gt;&lt;BR /&gt;PROCESSOR DATA&lt;BR /&gt; S-spec/QDF:  SL75Z&lt;BR /&gt; Sample/Prod: 00&lt;BR /&gt;&lt;BR /&gt;CORE DATA&lt;BR /&gt; Arch Revision                :  00&lt;BR /&gt; Core Family                  :  1F&lt;BR /&gt; Core Model                   :  01&lt;BR /&gt; Core Stepping                :  05&lt;BR /&gt; Max Core Frequency           : 1100 MHZ&lt;BR /&gt; Max SysBus Frequency         :  200 MHZ&lt;BR /&gt; Core Voltage                 : 1100 mV&lt;BR /&gt; Core Voltage Tolerance,High  :   16 mV&lt;BR /&gt; Core Voltage Tolerance,Low   :   16 mV&lt;BR /&gt;&lt;BR /&gt;CACHE DATA&lt;BR /&gt; Cache Size                   : 4096 KB&lt;BR /&gt;&lt;BR /&gt;....&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;RX4640 with 4* Montecito:&lt;BR /&gt;-------------------------&lt;BR /&gt;&lt;BR /&gt;Display FRU Information Menu:&lt;BR /&gt;     S - Specific FRU&lt;BR /&gt;     A - All available FRUs&lt;BR /&gt;     V - Display Mode: Text&lt;BR /&gt;&lt;BR /&gt;Enter menu item or [Q] to Quit: s&lt;BR /&gt;s&lt;BR /&gt;&lt;BR /&gt;      FRU IDs:&lt;BR /&gt;      --------&lt;BR /&gt;0032-CPU 0 PIROM&lt;BR /&gt;0033-CPU 1 PIROM&lt;BR /&gt;0034-CPU 2 PIROM&lt;BR /&gt;0035-CPU 3 PIROM&lt;BR /&gt;0036-Processor 0 RAM  0037-Processor 1&lt;BR /&gt;0038-Processor 2 RAM  0039-Processor 3 RAM  0001-Mem Extender&lt;BR /&gt;0002-Power Converter  0003-Power Supply 0   0004-Power Supply&lt;BR /&gt;0005-Diagnostic Panel 0006-Front Panel      0007-Disk Managem&lt;BR /&gt;0008-Disk Backplane   0010-Processor Board  0128-DIMM0A&lt;BR /&gt;0136-DIMM0B           0144-DIMM0C           0152-DIMM0D&lt;BR /&gt;0000-Motherboard&lt;BR /&gt;&lt;BR /&gt;Select FRU ID: 32&lt;BR /&gt;32&lt;BR /&gt;&lt;BR /&gt;FRU info N/AFRU NAME: CPU 0 PIROM ID:20&lt;BR /&gt;&lt;BR /&gt;PROCESSOR DATA&lt;BR /&gt; S-spec/QDF:  L9P8&lt;BR /&gt; Sample/Prod: 01&lt;BR /&gt;&lt;BR /&gt;CORE DATA&lt;BR /&gt; Arch Revision                :  00&lt;BR /&gt; Core Family                  :  20&lt;BR /&gt; Core Model                   :  00&lt;BR /&gt; Core Stepping                :  07&lt;BR /&gt; Max Core Frequency           : 1600 MHZ&lt;BR /&gt; Max SysBus Frequency         :  267 MHZ&lt;BR /&gt; Core Voltage                 : 1100 mV&lt;BR /&gt; Core Voltage Tolerance,High  :   32 mV&lt;BR /&gt; Core Voltage Tolerance,Low   :   96 mV&lt;BR /&gt;&lt;BR /&gt;CACHE DATA&lt;BR /&gt; Cache Size                   :   18 MB&lt;BR /&gt;&lt;BR /&gt;.....&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;HTH&lt;BR /&gt;&lt;BR /&gt;Kris</description>
      <pubDate>Mon, 14 Sep 2009 06:57:16 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496141#M5542</guid>
      <dc:creator>kris rombauts</dc:creator>
      <dc:date>2009-09-14T06:57:16Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496142#M5543</link>
      <description>&lt;!--!*#--&gt;"machinfo" in 11.23 is counting cores, in 11.31 it is counting modules (with cores per socket), e.g.&lt;BR /&gt;&lt;BR /&gt;11.23:&lt;BR /&gt;6 CPUs in a cell (must be cores)&lt;BR /&gt;...&lt;BR /&gt;processor   0  3/120           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;processor   1  3/121           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;processor   2  3/122           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;processor   3  3/123           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;processor   4  3/124           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;processor   5  3/125           processor CLAIMED     PROCESSOR    Processor&lt;BR /&gt;...&lt;BR /&gt;&lt;BR /&gt;/usr/contrib/bin/machinfo&lt;BR /&gt;CPU info:&lt;BR /&gt;   Number of CPUs = 6&lt;BR /&gt;   Clock speed = 1100 MHz&lt;BR /&gt;   Bus speed   = 400 MT/s&lt;BR /&gt;   CPUID registers&lt;BR /&gt;      vendor information =       "GenuineIntel"&lt;BR /&gt;      processor serial number =  0x0000000000000000&lt;BR /&gt;      processor version info =   0x000000001f010504&lt;BR /&gt;         architecture revision:       0&lt;BR /&gt;         processor family:           31   Intel(R) Itanium 2 Family Processors&lt;BR /&gt;         processor model:             1   Intel(R) Itanium 2 processor&lt;BR /&gt;         processor revision:          5   Stepping B1&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;...&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;11.31:&lt;BR /&gt;&lt;BR /&gt;/usr/contrib/bin/machinfo&lt;BR /&gt;CPU info:&lt;BR /&gt;  1 Intel(R) Itanium 2 9000 series processor (1.59 GHz, 18 MB)&lt;BR /&gt;          532 MT/s bus, CPU version C2&lt;BR /&gt;          2 logical processors (2 per socket)&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Mon, 14 Sep 2009 16:24:45 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496142#M5543</guid>
      <dc:creator>Torsten.</dc:creator>
      <dc:date>2009-09-14T16:24:45Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496143#M5544</link>
      <description>Thanks for the replies. Physical access right now is a bit of an issue, so machinfo seems to be the only way. Torstens answer seems to confirm my findings.</description>
      <pubDate>Fri, 18 Sep 2009 11:31:55 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496143#M5544</guid>
      <dc:creator>Modris Bremze</dc:creator>
      <dc:date>2009-09-18T11:31:55Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496144#M5545</link>
      <description>Finally you should have space for 2 more modules in both servers.</description>
      <pubDate>Fri, 18 Sep 2009 11:46:00 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496144#M5545</guid>
      <dc:creator>Torsten.</dc:creator>
      <dc:date>2009-09-18T11:46:00Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496145#M5546</link>
      <description>For HP-UX 11.23 there is a patch PHCO_37801 which provides information about number of sockets and cores per socket for multi-core processors.</description>
      <pubDate>Fri, 18 Sep 2009 17:23:19 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496145#M5546</guid>
      <dc:creator>Sameer_Nirmal</dc:creator>
      <dc:date>2009-09-18T17:23:19Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496146#M5547</link>
      <description>&lt;!--!*#--&gt;Nice new feature, from the patch database:&lt;BR /&gt;&lt;BR /&gt;The machinfo command is enhanced to provide the following&lt;BR /&gt; information:&lt;BR /&gt;&lt;BR /&gt; # machinfo&lt;BR /&gt; CPU info:&lt;BR /&gt;    Number of CPUs = 4&lt;BR /&gt;    Number of enabled CPUs = 4&lt;BR /&gt;    Number of enabled sockets = 2&lt;BR /&gt;    Cores per socket = 2&lt;BR /&gt;         ...&lt;BR /&gt;</description>
      <pubDate>Fri, 18 Sep 2009 17:59:37 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496146#M5547</guid>
      <dc:creator>Torsten.</dc:creator>
      <dc:date>2009-09-18T17:59:37Z</dc:date>
    </item>
    <item>
      <title>Re: machinfo output interpretation on rx4640</title>
      <link>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496147#M5548</link>
      <description>Right, thanks. I'll check out the pach for future occasions.</description>
      <pubDate>Fri, 25 Sep 2009 19:11:39 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/machinfo-output-interpretation-on-rx4640/m-p/4496147#M5548</guid>
      <dc:creator>Modris Bremze</dc:creator>
      <dc:date>2009-09-25T19:11:39Z</dc:date>
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