<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Deconf DIMMs in Integrity Servers</title>
    <link>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646861#M6500</link>
    <description>some rules for memory from another post in itrc from VK2COT.&lt;BR /&gt;&lt;BR /&gt;Here are the memory loading rules for RX7640:&lt;BR /&gt;&lt;BR /&gt;a) Memory must be installed in pairs&lt;BR /&gt;(two DIMMs of equal size);&lt;BR /&gt;&lt;BR /&gt;b) Minimum memory is 2 GB per cell (RX7640&lt;BR /&gt;can have up to two cells);&lt;BR /&gt;&lt;BR /&gt;c) Larger DIMMs must be loaded first across&lt;BR /&gt;a cell, followed by progressively smaller&lt;BR /&gt;DIMMs;&lt;BR /&gt;&lt;BR /&gt;d) On each cell board, memory pairs must be&lt;BR /&gt;installed in the following order:&lt;BR /&gt;&lt;BR /&gt;(0A, 0B), (1A, 1B), (2A, 2B), (3A, 3B),&lt;BR /&gt;(4A, 4B), (5A, 5B), (6A, 6B), (7A, 7B)&lt;BR /&gt;&lt;BR /&gt;e) DIMM mixing other than recommended&lt;BR /&gt;configurations is supported as long as&lt;BR /&gt;memory loading rules are followed.&lt;BR /&gt;&lt;BR /&gt;f) Load memory equally across the available&lt;BR /&gt;cell boards;&lt;BR /&gt;&lt;BR /&gt;g) For best performance, a cell should&lt;BR /&gt;be configured with a multiple of eight&lt;BR /&gt;DIMMs or four pairs (although the server&lt;BR /&gt;will work with an odd number of pairs).&lt;BR /&gt;It takes eight DIMMs to populate both&lt;BR /&gt;memory buses. If only one memory bus is&lt;BR /&gt;populated, the cell board will deliver half&lt;BR /&gt;the peak memory bandwidth.&lt;BR /&gt;&lt;BR /&gt;</description>
    <pubDate>Sun, 13 Jun 2010 08:18:01 GMT</pubDate>
    <dc:creator>AnthonySN</dc:creator>
    <dc:date>2010-06-13T08:18:01Z</dc:date>
    <item>
      <title>Deconf DIMMs</title>
      <link>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646860#M6499</link>
      <description>I have a Rx7620 server running HP-UX 11.23i&lt;BR /&gt;&lt;BR /&gt;I had 16GB of RAM installed and while doing a power cycle, a cell board failed. I replaced the cell board and installed the DIMMs from the faulty cell board to the new cell board.&lt;BR /&gt;&lt;BR /&gt;Now server sows only 14GB of RAM.&lt;BR /&gt;&lt;BR /&gt;The output of the command "echo "selclass qualifier memory;info;wait;infolog" | cstm" is shown below:&lt;BR /&gt;&lt;BR /&gt;Basic Memory Description&lt;BR /&gt;&lt;BR /&gt;   Module Type: MEMORY&lt;BR /&gt;   Page Size: 4096 Bytes&lt;BR /&gt;   Total Physical Memory: 16384 MB&lt;BR /&gt;   Total Configured Memory: 14336 MB&lt;BR /&gt;   Total Deconfigured Memory: 2048 MB&lt;BR /&gt;&lt;BR /&gt;Memory Board Inventory&lt;BR /&gt;&lt;BR /&gt;   DIMM Location          Size(MB) State   Serial Num       Part Num&lt;BR /&gt;   --------------------   -------- ------- ---------------- ------------------&lt;BR /&gt;   Cab 0 Cell 0 DIMM 0A   1024     Config  A56E05276344     A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 0B   1024     Config  A56E05276341     A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 1A   1024     Deconf  A56E05276288     A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 1B   1024     Deconf  A56E05274291     A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 2A   1024     Config  PRY08011NT       A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 2B   1024     Config  PRY0750127       A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 3A   1024     Config  PRY08011XT       A6098-60101&lt;BR /&gt;   Cab 0 Cell 0 DIMM 3B   1024     Config  PRY08011LN       A6098-60101&lt;BR /&gt;&lt;BR /&gt;   Cab 0 Cell 0 Total: 8192 (MB)&lt;BR /&gt;&lt;BR /&gt;   ===========================================================================&lt;BR /&gt;&lt;BR /&gt;   DIMM Location          Size(MB) State   Serial Num       Part Num&lt;BR /&gt;   --------------------   -------- ------- ---------------- ------------------&lt;BR /&gt;   Cab 0 Cell 1 DIMM 0A   1024     Config  A56E05274292     A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 0B   1024     Config  A56E05274278     A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 1A   1024     Config  A56E05274283     A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 1B   1024     Config  A56E05318669     A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 2A   1024     Config  PRY08011Z3       A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 2B   1024     Config  PRY08054P2       A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 3A   1024     Config  PRY08011M6       A6098-60101&lt;BR /&gt;   Cab 0 Cell 1 DIMM 3B   1024     Config  PRY0750183       A6098-60101&lt;BR /&gt;&lt;BR /&gt;   Cab 0 Cell 1 Total: 8192 (MB)&lt;BR /&gt;&lt;BR /&gt;   ===========================================================================&lt;BR /&gt;&lt;BR /&gt;Memory Error Log Summary&lt;BR /&gt;&lt;BR /&gt;   The memory error log is empty.&lt;BR /&gt;</description>
      <pubDate>Sun, 13 Jun 2010 05:24:09 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646860#M6499</guid>
      <dc:creator>Subentu</dc:creator>
      <dc:date>2010-06-13T05:24:09Z</dc:date>
    </item>
    <item>
      <title>Re: Deconf DIMMs</title>
      <link>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646861#M6500</link>
      <description>some rules for memory from another post in itrc from VK2COT.&lt;BR /&gt;&lt;BR /&gt;Here are the memory loading rules for RX7640:&lt;BR /&gt;&lt;BR /&gt;a) Memory must be installed in pairs&lt;BR /&gt;(two DIMMs of equal size);&lt;BR /&gt;&lt;BR /&gt;b) Minimum memory is 2 GB per cell (RX7640&lt;BR /&gt;can have up to two cells);&lt;BR /&gt;&lt;BR /&gt;c) Larger DIMMs must be loaded first across&lt;BR /&gt;a cell, followed by progressively smaller&lt;BR /&gt;DIMMs;&lt;BR /&gt;&lt;BR /&gt;d) On each cell board, memory pairs must be&lt;BR /&gt;installed in the following order:&lt;BR /&gt;&lt;BR /&gt;(0A, 0B), (1A, 1B), (2A, 2B), (3A, 3B),&lt;BR /&gt;(4A, 4B), (5A, 5B), (6A, 6B), (7A, 7B)&lt;BR /&gt;&lt;BR /&gt;e) DIMM mixing other than recommended&lt;BR /&gt;configurations is supported as long as&lt;BR /&gt;memory loading rules are followed.&lt;BR /&gt;&lt;BR /&gt;f) Load memory equally across the available&lt;BR /&gt;cell boards;&lt;BR /&gt;&lt;BR /&gt;g) For best performance, a cell should&lt;BR /&gt;be configured with a multiple of eight&lt;BR /&gt;DIMMs or four pairs (although the server&lt;BR /&gt;will work with an odd number of pairs).&lt;BR /&gt;It takes eight DIMMs to populate both&lt;BR /&gt;memory buses. If only one memory bus is&lt;BR /&gt;populated, the cell board will deliver half&lt;BR /&gt;the peak memory bandwidth.&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Sun, 13 Jun 2010 08:18:01 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646861#M6500</guid>
      <dc:creator>AnthonySN</dc:creator>
      <dc:date>2010-06-13T08:18:01Z</dc:date>
    </item>
    <item>
      <title>Re: Deconf DIMMs</title>
      <link>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646862#M6501</link>
      <description>Subentu,&lt;BR /&gt;&lt;BR /&gt;Seems in Cell#0 , 2 DIMM not seated properly.&lt;BR /&gt;IA &amp;amp; 1B.  You have to do it again, have power it off, open cellboard, re-open the dimm connect back in the slot firmly.&lt;BR /&gt;&lt;BR /&gt;Cab 0 Cell 0 DIMM 1A 1024 Deconf A56E05276288 A6098-60101&lt;BR /&gt;Cab 0 Cell 0 DIMM 1B 1024 Deconf A56E05274291 A6098-60101&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Before you can boot the os , you need to interrupt in EFI and use the command  at EFI prompt: &lt;BR /&gt;&lt;BR /&gt;info sys&lt;BR /&gt;info memory   &lt;BR /&gt;&lt;BR /&gt;When you will see all the 16GB memory, that is all memory are correcly loaded , and then only boot it into multiuser mode by rebooting it again.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;Hth,&lt;BR /&gt;Raj.&lt;BR /&gt;</description>
      <pubDate>Sun, 13 Jun 2010 08:31:18 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646862#M6501</guid>
      <dc:creator>Raj D.</dc:creator>
      <dc:date>2010-06-13T08:31:18Z</dc:date>
    </item>
    <item>
      <title>Re: Deconf DIMMs</title>
      <link>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646863#M6502</link>
      <description>"Load memory equally across the available&lt;BR /&gt;cell boards"&lt;BR /&gt;&lt;BR /&gt;Does having 8GB in one cell and 6GB in the other harm the server ? Or this rule is for best performance only ?</description>
      <pubDate>Sun, 13 Jun 2010 12:00:30 GMT</pubDate>
      <guid>https://community.hpe.com/t5/integrity-servers/deconf-dimms/m-p/4646863#M6502</guid>
      <dc:creator>Subentu</dc:creator>
      <dc:date>2010-06-13T12:00:30Z</dc:date>
    </item>
  </channel>
</rss>

