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03-28-2007 04:49 AM
03-28-2007 04:49 AM
anyone tell me the default stripe size in xp1024 raid 0/1 ?
now we use 2d+2d raid0/1 (open-L), and will use 4d+4d later.
Is the stripe size configurable?
-Xiang
Is the stripe size configurable?
-Xiang
1 REPLY 1
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04-09-2007 03:03 AM
04-09-2007 03:03 AM
Re: anyone tell me the default stripe size in xp1024 raid 0/1 ?
Internal Transfer Quanta (Stripe Chunk)
On all generations of SE9900 storage prior to SE9990, all OPEN device emulations used
a slot/track size of 48k. A stripe chunk consisted of 8 slots (384k). A full stripe ranged
from 768k to 2688k, depending on the number of data chunks in the RAID type.
For example, the stripe size for RAID1 2+2 was (2)(384) = 768k. Â
Eight parity cycles were required to generate parity for each stripe chunk.
With the introduction of SE9990, there have been two significant architectural changes.
The SE9990 cache slot size has  increased from 64k to 256k, and the OPEN-V
track/slot size has also been raised to 256k. The OPEN-V stripe chunk size will be 512k
(2 tracks), and thus only 2 parity cycles will be required for each stripe chunk.
Therefore on SE9990, we can simplify and gain efficiencies in cache management by
using the OPEN-V emulation. These advantages will be realized because the OPEN-V
track size matches the cache slot size, and because 75% fewer parity cycles are required for a stripe chunk that includes 128k more data than other emulations.
Therefore, more data can be moved with less overhead.
On all generations of SE9900 storage prior to SE9990, all OPEN device emulations used
a slot/track size of 48k. A stripe chunk consisted of 8 slots (384k). A full stripe ranged
from 768k to 2688k, depending on the number of data chunks in the RAID type.
For example, the stripe size for RAID1 2+2 was (2)(384) = 768k. Â
Eight parity cycles were required to generate parity for each stripe chunk.
With the introduction of SE9990, there have been two significant architectural changes.
The SE9990 cache slot size has  increased from 64k to 256k, and the OPEN-V
track/slot size has also been raised to 256k. The OPEN-V stripe chunk size will be 512k
(2 tracks), and thus only 2 parity cycles will be required for each stripe chunk.
Therefore on SE9990, we can simplify and gain efficiencies in cache management by
using the OPEN-V emulation. These advantages will be realized because the OPEN-V
track size matches the cache slot size, and because 75% fewer parity cycles are required for a stripe chunk that includes 128k more data than other emulations.
Therefore, more data can be moved with less overhead.
The opinions expressed above are the personal opinions of the authors, not of Hewlett Packard Enterprise. By using this site, you accept the Terms of Use and Rules of Participation.
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