What is meant by Double Chip spare is enabled in each pair DIMMs

[Md. Minhaz Khan]

Dear Concern,

We are thinking to buy BL890c i2 server. When we are reading memory feature of this server from HP product Bulletin, we have found Double Chip spare is enabled in each pair DIMMs.

Can anyone give me a detail understanding, What is meant by Double Chip spare is enabled in each pair DIMMs??

Also is ECC (Single-bit error correction) is enabled in these memory module??

Thanks
Minhaz

[Torsten.]

There was anywhere on hp.com a link to a white paper about the sx2000 chipset that explains this feature.

In easy words, the DIMM works more or less like a raid5, so it can correct even multibit errors.

[Rajesh K Chaurasia]

Double chip spare is explained in brief in following document on page 14

http://h40089.www4.hp.com/integrity/pdf/4AA0-7545EEE.pdf

"Double-chip-sparing technology is a unique firmware function that can permanently detect/correct an error in a DRAM by recognising failure and then â erasingâ
DRAM bits from the Error Correcting Code (ECC) calculations. It also allows the ECC logic to correct for a second DRAM failure in the same ECC codeword. This reduces the likelihood of a memory-induced crash compared to single-chip-sparing and is more cost effective than memory mirroring..."

HP Integrity servers use ECC DIMMs. So single bit error correction is enabled.

Regards
-Rajesh