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Re: porting Makefile

 
Berardi Angelo
Occasional Contributor

porting Makefile

I am trying to port to HP-UX 11i v3 system an application
in C++ language written for a Tru64 Unix V5.

I am trying to execute on HP-UX 11i v3 a Makefile written for
Tru64 Unix V5 with this code:

$(TARGET_MORE): $(DEPEND_FILE) $(SOURCE_MORE.cc) $(LIBS)
@for i in $(TARGET_MORE); do \
$(LINK_MORE); \
done

The for instruction and the instrutions under has a tab on the front.
When I execute make I have an syntax error on the line of the for
instruction. This code works properly on Tru64 Unix V5
I tested the code changing it this way

$(TARGET_MORE): $(DEPEND_FILE) $(SOURCE_MORE.cc) $(LIBS)
for var in one two three ; do
echo $var
done

and I still have a syntax error on the line of the for code.
In the second example the for cycle works properly if I execute it on the shell
out of the Makefile.
In all the Makefile this is the first point where there is the for instruction.
I have used the the gcc compiler, the korn shell, the posix shell.
What changes must I do so this Makefile works on HP-UX 11i v3.

I Thank you in advance.

Angelo Berardi
2 REPLIES 2
Rob Leadbeater
Honored Contributor

Re: porting Makefile

Hi,

I'll guess this is something to do with different versions of make being used on the two platforms...

Can we assume that you're using GNU make on HP-UX and Compaq/HP's make on Tru64 ?

Seeing the exact commands you're running, and the exact output would be useful...

Cheers,

Rob
Steven Schweda
Honored Contributor

Re: porting Makefile

If I had a problem on HP-UX, I'd probably ask
about it in an HP-UX forum.

> Can we assume that you're using GNU make
> on HP-UX [...]

Why would we assume this (or anything)?

> [...] a Makefile written for
Tru64 Unix V5 with this code:

We can't see your "make" macro values, so we
can't know what "make" is trying to do. (At
least we non-psychics can't know...)

> I tested the code changing it this way

There was a reason for all those "\"
characters on the action line in the original
"make" file.

> echo $var

"make" eats that "$".

A simple test "make" file seems to work as
expected on my HP-UX system:

dyi # cat makefile
target :
for var in one two three ; do \
echo $$var ; \
done

dyi # make
for var in one two three ; do \
echo $var ; \
done
one
two
three
dyi #

Note that "$$var" in the "make" file becomes
"$var" for the shell. Note also that with
the "\" characters, that's one "make" action
line, so only the first physical line really
needs to begin with a Tab, but it looks
better when all three physical lines begin
with a Tab.

dyi # uname -a
HP-UX dyi B.11.31 U ia64 4235313755 unlimited-user license

dyi # type make
make is hashed (/usr/bin/make)

You might try some "make" options like "-d"
or "-p" to see if they tell you anything.
Or, you could add some "echo" action lines to
show what's true:

dyi # cat makefile2
LIST=one two three

target :
echo "LIST: >$(LIST)<"
for var in $(LIST) ; do \
echo $$var ; \
done

dyi # make -f makefile2
echo "LIST: >one two three<"
LIST: >one two three<
for var in one two three ; do \
echo $var ; \
done
one
two
three
dyi #