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Error in HP0-Y30 exam preparation guide?

Esteemed Contributor

Error in HP0-Y30 exam preparation guide?

Hi everyone,


I have found what i believe to be an error in the exam preparation guide for HP0-Y30. As i haven't yet taken this exam, i don't know whether this is an error in published exam questions as well, or just in the prep guide.


In practice question 8, five topologies for IRF are drawn, and we are asked to pick two correct ones.  The answers given are A (daisy-chain) and D (ring).  Topology B in the answers is said to be a tree topology, and therefore incorrect.  However, on p. 19 of the A5500 IRF configuration guide, a valid IRF topology is drawn which exactly matches topology B in the practice question.


Given the rules for IRF formation, there can be no functional difference between topologies A & B, since at any time the priority of a switch in the middle of the daisy chain could be higher than than the one at the end.  Also, its uptime could be longer or its MAC address could be lower.  Thus B should be a correct topology on the practice exam, and answers A & B should be merged.


I'm unable to validate this on real equipment, because my IRF stack has only 2 switches, but i'm reasonably confident about this, given the rules of IRF stack formation.