prioris hx5100mp/4 server

[scott domars]

On the main logic board (54-xxx-01), there are a group af jumpers marked J4. These are not to be confused with the J4 on the cpu module. These jumpers appear to be jumpered to accomodate the different versions of server.i.e. HX5100DP or HX5100MP/4. Does someone have a diagram or table showing these jumpers and their function?
Also, how is the FSB set on these machines. The only literature I have shows the FSB changing to accomodate the respective cpu, but after testing this is not the case, my machine stays locked at 50MHz. Is this also part of the function of J4? or is it a SCU issue?
Thanks,
Scott

[Tony Glynn_1]

Scott,

I had a look @ the internal documents for the MB P/N 54-24032-01. There are no jumpers J4 mentioned in the document (I'm not saying they are not there... They don't surface in the docs). The jumpers illustrated don't mention changing server version numbers either.

Did 100Mhz P1's bus speed ever run above 50mhz? As the machine was MP I would be very surprised if the chipset (Hydra) allowed you to change it.

Head kicking machine for its time!

[scott domars]

Tony,
Thanks for the reply. I have seen the gif you attached elsewhere, and am aware it has no reference to J4. The illusive J4 is situated approximately between #8 and #9 on your diagram.
I have other info regarding the jumpers.
The jumpers are an array of pins 3 wide by 7 tall. On my HX MP server the jumpers are configured as follows:
row 1: pins 1&2 shorted.
row 2: pins 1&2 shorted.
row 3: pins 2&3 shorted.
row 4: pins 2&3 shorted.
row 7: pins 1&2 shorted.

For HX DP server pins as follows (I believe):
row 1: pins 1&2 shorted.
row 2: pins 2&3 shorted.
rom 7: pins 1&2 shorted.
If I was to install another memory module to achieve 4 way interleaving, how would J4 be configured then?
Is a schematic available for this machine? I know it would be large, but it surely put to bed the function of J4.
Thanks,
Scott

[scott domars]

Tony,
Thanks for the reply. I have seen the gif you attached elsewhere, and am aware it has no reference to J4. The illusive J4 is situated approximately between #8 and #9 on your diagram.
I have other info regarding the jumpers.
The jumpers are an array of pins 3 wide by 7 tall. On my HX MP server the jumpers are configured as follows:
row 1: pins 1&2 shorted.
row 2: pins 1&2 shorted.
row 3: pins 2&3 shorted.
row 4: pins 2&3 shorted.
row 7: pins 1&2 shorted.

For HX DP server pins as follows (I believe):
row 1: pins 1&2 shorted.
row 2: pins 2&3 shorted.
rom 7: pins 1&2 shorted.
If I was to install another memory module to achieve 4 way interleaving, how would J4 be configured then?
Is a schematic available for this machine? I know it would be large, but it surely put to bed the function of J4.
Thanks,
Scott

[scott domars]

Tony,
Thanks for the reply. I have seen the gif you attached elsewhere, and am aware it has no reference to J4. The illusive J4 is situated approximately between #8 and #9 on your diagram.
I have other info regarding the jumpers.
The jumpers are an array of pins 3 wide by 7 tall. On my HX MP server the jumpers are configured as follows:
row 1: pins 1&2 shorted.
row 2: pins 1&2 shorted.
row 3: pins 2&3 shorted.
row 4: pins 2&3 shorted.
row 7: pins 1&2 shorted.

For HX DP server pins as follows (I believe):
row 1: pins 1&2 shorted.
row 2: pins 2&3 shorted.
rom 7: pins 1&2 shorted.
If I was to install another memory module to achieve 4 way interleaving, how would J4 be configured then?
Is a schematic available for this machine? I know it would be large, but it surely put to bed the function of J4.
Thanks,
Scott

[scott domars]

Tony,
Thanks for the reply. I have seen the gif you attached elsewhere, and am aware it has no reference to J4. The illusive J4 is situated approximately between #8 and #9 on your diagram.
I have other info regarding the jumpers.
The jumpers are an array of pins 3 wide by 7 tall. On my HX MP server the jumpers are configured as follows:
row 1: pins 1&2 shorted.
row 2: pins 1&2 shorted.
row 3: pins 2&3 shorted.
row 4: pins 2&3 shorted.
row 7: pins 1&2 shorted.

For HX DP server pins as follows (I believe):
row 1: pins 1&2 shorted.
row 2: pins 2&3 shorted.
rom 7: pins 1&2 shorted.
If I was to install another memory module to achieve 4 way interleaving, how would J4 be configured then?
Is a schematic available for this machine? I know it would be large, but it surely put to bed the function of J4.
Thanks,
Scott