How can i know 3nd Level Cache？

[okyou]

Hi All

which method can i know the 3nd Level Cache for our PA Risk server& Itanium？ thanks

[Kapil Jha]

machinfo is your friend it would tell you the information.

BR,
Kapil+

[Dennis Handly]

What will you do with this info?

Note: machinfo for PA is only there for 11.31.

For Integrity 11.23 I see:
Cache info:
L1 Instruction: size = 16 KB, associativity = 4
L1 Data: size = 16 KB, associativity = 4
L2 Unified: size = 256 KB, associativity = 8
L3 Unified: size = 1536 KB, associativity = 6

For some reason this is missing from my 11.31 systems?

[Dennis Handly]

Ah, machinfo(1) indicates you need to add the -v option.

[Matti_Kurkela]

As far as I know, none of the PA-RISC processors had a 3rd level cache. In other words, in a PA-RISC architecture, the L3 cache size is always 0.

MK

[Torsten.]

PA-Risc CPUs have L1 and L2 only, Itanium have L3 too:

# machinfo -v
CPU info:
2 Intel(R) Itanium 2 9100 series processors (1.67 GHz, 18 MB)
666 MT/s bus, CPU version A1
4 logical processors (2 per socket)

Vendor identification: GenuineIntel
Processor version info: 0x0000000020010104
Family 32, model 1, stepping 1
Processor capabilities: 0x0000000000000005
Implements long branch
Implements 16-byte atomic operations
Bus features supported: 0xbdf0000020000000
Bus features enabled: 0x0000000000000000
L1 Instruction cache: 16 KB, 4-way
L1 Data cache: 16 KB, 4-way
L2 Instruction cache: 1 MB, 8-way
L2 Data cache: 256 KB, 8-way
L3 Unified cache: 9 MB, 9-way
...