Porting C++ from PA_RISC to Itanium

[Nick Battle_1]

I'm trying to estimate the cost of moving a large C/C++ application from HP-UX 11.11 PA_RISC 32-bit, to 11.23 Itanium 32-bit. We intend to re-compile from source.

I've read various transition guides and papers, but I'd be grateful if anyone could answer the following queries:

Is Itanium's byte ordering the same as PA_RISC (big-endian)? We have a lot of code that directly manipulates bytes in words, so this would be an issue.

Is Itanium's default 32-bit structure alignment the same as PA_RISC? If fields move, or structures get bigger, this could be an issue for us.

Is 11.23's 32-bit shared memory model the same on Itanium? PA_RISC limits us to shmem from Quadrants 3 and 4, and only three quarters of 4 (ie. 1.75Gb in total).

Are there any other surprises I should know about? :-)

Cheers,
-nick

[Sanjay Yugal Kishore Ha · Accepted solution]

Hello Nick,

Posting on behalf of the teammate who works with compilers at HP and also provided the answers.

1. Yes. Both HP-UX PA and HP-UX IA are big endian.
Since you mention that your code is endian aware, I strongly recommend that you run HP Code Advisor static analysis tool on the sources first to locate and clean any possible issues.
It is downloadable from www.hp.com/go/cadvise

2. Yes.

3. Yes. However, you need to be aware that if you plan to convert
Q3/Q4 private, you need to enable MPAS (mostly private address space).
This is well documented at docs.hp.com documents on MPAS.

HTH,
Sanjay

[Nick Battle_1]

Sanjay,

Thanks very much for the quick response.

I did come across the Code Assist tool, so I'll take a look at that.

Cheers,
-nick