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difference between RISC and Mainframe

 
hp-ux_2
Occasional Advisor

difference between RISC and Mainframe

Hi,
Can tell somebody what is the difference between RISC and Mainframe.

Anit Jha
5 REPLIES 5
Steven E. Protter
Exalted Contributor

Re: difference between RISC and Mainframe

Shalom hp-ux,

Two totally different approaches. PA-RISC is the Reduced Instruction Set Computing, used in HP-9000 servers, which are based on relatively current technology.

Mainframes are big, rellics used for legacy applications and government. The technology is not on the same level as your HP-9000 server. They do perform important functions, and IBM continues selling them I believe.

Alas, HP has announced it won't be developing new PA-RISC based servers, so both will someday be obsolete.

SEP
Steven E Protter
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Asif Sharif
Honored Contributor

Re: difference between RISC and Mainframe

Hi Anit,
Please read the following links.

http://en.wikipedia.org/wiki/RISC
http://en.wikipedia.org/wiki/Mainframe


Regards,

Asif Sharif
Regards,
Asif Sharif
hp-ux_2
Occasional Advisor

Re: difference between RISC and Mainframe

Hi,
Where can i get mainframe technical detail.
Asif Sharif
Honored Contributor

Re: difference between RISC and Mainframe

http://www-03.ibm.com/servers/eserver/zseries/

Regards,

Asif Sharif
Regards,
Asif Sharif
Ted Buis
Honored Contributor

Re: difference between RISC and Mainframe

Mainframs are Complex Instruction Set Computers (CISC) whose instructions set were defined int the 60's and 70's. At the time, high speed instruction/data caches hadn't been invented. The could microcode the processor to do muliple instructions in a cycle before the next instruction or data could be fetched from memory, so it was more efficient to have CISC design. That has obviously changed over time, and so have the original factors that drove RISC designs. The first pa-risc chip had .5M transistors, and now there are hundres of millions of transistors on a chip. The newest technology is EPIC, although SUN is trying to just cram more slow processors into a single chip, and do four way threading of each CPU. This is okay for some applications, but fail badly for others.
Mom 6