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makefile padding white space while preprocessing

 
ASR
Contributor

makefile padding white space while preprocessing


I have two files make_incs.h and testfile. Below are the file contents:

make_incs.h:
------------

#define DH_JAVA_FILE_NAME test1

testfile:
----------
#include "./make_incs.h"

JVC=/opt/java1.5/bin/javac

PACKROOT=.

PACK_OPTION = -d $(PACKROOT)

JAVA_FILE_NAME=DH_JAVA_FILE_NAME+"Hai"

TARGETS=test.java $(JAVA_FILE_NAME).java

all: $(TARGETS)
@$(JVC) $(PACK_OPTION) $?

When we execute the below command I noticed a whitespace is appending to macro.
$ cc -E pmakefile
# 1 "pmakefile"


# 1 "./make_incs.h"

# 3 "testfile"

JVC=/opt/java1.5/bin/javac

PACKROOT=.

PACK_OPTION = -d $(PACKROOT)

JAVA_FILE_NAME=test1 +"Hai"

TARGETS=test.java $(JAVA_FILE_NAME).java

all: $(TARGETS)
@$(JVC) $(PACK_OPTION) $?
$

On the above, please notice a white space is adding after test1. I need sombody's help for how an extra space is comming afgter test1 and how to overcome this issue.


3 REPLIES 3
Peter Nikitka
Honored Contributor

Re: makefile padding white space while preprocessing

Hi,

the C-Preprocessor has its own thinking about padding, what is asumed to be an instruction...

Change your statement this way:
<< JAVA_FILE_NAME=test1 +"Hai"
to
>> JAVA_FILE_NAME=test1/**/+"Hai"

mfG Peter
The Universe is a pretty big place, it's bigger than anything anyone has ever dreamed of before. So if it's just us, seems like an awful waste of space, right? Jodie Foster in "Contact"
Steven Schweda
Honored Contributor

Re: makefile padding white space while preprocessing

Which "cc" is that? Around here, I can't
find a "cpp" which misbehaves:

dy # cc -E itrc.c | grep JAVA_FILE_NAME=
JAVA_FILE_NAME=test1+"Hai"

dy # /usr/ccs/lbin/cpp -E itrc.c | grep JAVA_FILE_NAME=
JAVA_FILE_NAME=test1+"Hai"

dy # /usr/local/bin/cpp -E itrc.c | grep JAVA_FILE_NAME=
JAVA_FILE_NAME=test1+"Hai"


dy # uname -a
HP-UX dy B.11.11 U 9000/785 2012616114 unlimited-user license

dy # cc -v
(Bundled) cc: NLSPATH is /usr/lib/nls/msg/%L/%N.cat:/usr/lib/nls/msg/C/%N.cat:
(Bundled) cc: CCOPTS is not set.
(Bundled) cc: INCLUDIR is INCLUDIR=/usr/include

dy # what /usr/ccs/lbin/cpp
/usr/ccs/lbin/cpp:
HP92453-01 B.11.11.02 HP C (Bundled) Preprocessor
$ Sep 8 2000 23:13:51 $

dy # /usr/local/bin/cpp --version
cpp (GCC) 4.3.2
[...]
Dennis Handly
Acclaimed Contributor

Re: makefile padding white space while preprocessing

It is illegal to use cpp(1) for any but C source:
Thus the output of cpp is designed to be in a form acceptable as input to the next pass of the C compiler. As the C language evolves, cpp and the rest of the C compilation package will be modified to follow these changes. Therefore, the use of cpp in other than this framework is not suggested.

>how to overcome this issue.

Several ways.
1) Why use cpp when make has macros?
Change to:
include make_incs.h
DH_JAVA_FILE_NAME=test1
JAVA_FILE_NAME=$(DH_JAVA_FILE_NAME)+"Hai"

2) Use the off chip K&R preprocessor:
cc -E +legacy_cpp=/usr/ccs/lbin/cpp

>Peter: Change your statement this way:
>> JAVA_FILE_NAME=test1/**/+"Hai"

I get even more spaces for all but K&R cpp, which doesn't need the kludge.

>Steven: I can't find a "cpp" which misbehaves:

Your crystal ball isn't working and you aren't on aC++, Integrity. :-)
And for PA it would only work for K&R mode.