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06-04-2006 07:02 PM - last edited on 01-30-2012 12:39 AM by Ajay-Kumar
06-04-2006 07:02 PM - last edited on 01-30-2012 12:39 AM by Ajay-Kumar
PA1.1 & PA2.0
HI,
Is there anybody know about the difference between PA1.1 and PA2.0.
What stands for PA?
What stands for 1.1 or 2.0?
How can i know in our system?
-------------------------------
P.S. This Thread has been moved from Servers --> General to HP-UX --> System Administration - Forum Moderator
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06-04-2006 07:07 PM
06-04-2006 07:07 PM
Re: PA1.1 & PA2.0
PA -- Precision Architecture
1.1 and 2.0 -- 32 bit and 64 bit support
# getconf HW_CPU_SUPP_BITS
# getconf HW_32_64_CAPABLE
-Arun
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06-05-2006 01:52 AM
06-05-2006 01:52 AM
Re: PA1.1 & PA2.0
Here is a site that details PA-RISC processors
http://www.parisc-linux.org/documentation/index.html
If you have a PA 8X00 processor or higher you have a PA RISC 2.0 processor
I believe if the processor is PA 7X00 then it is 1.1.
You can use stm as one way to find the process model
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06-05-2006 01:59 AM
06-05-2006 01:59 AM
Re: PA1.1 & PA2.0
#file /stand/vmunix
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06-05-2006 05:00 AM
06-05-2006 05:00 AM
Re: PA1.1 & PA2.0
PA1.1->32-bit
'89 PA7000 (PCx-S), PA7100 (PCx-T),
PA7150 (PCx-T+), PA7100LC (PCx-L),
PA7200 (PCx-T'), PA7300LC (PCx-L2)
PA2.0->64-bit
'94 PA8000 (PCx-U), PA8200 (PCx-U+),
PA8500 (PCx-W),PA8600 (PCx-W+),
PA8700 (PCx-W2), PA8800, PA8900
PA1.1-> Included additional floating-point capabilities,
such as more floating-point registers, doubling the amount of register
space for single-precision floating-point numbers, and introducing
combined operation floating-point instructions[3]. These floating-point
features enabled higher performance in technical computations, including
graphics, where single-precision floating-point numbers are extensively
used.
In the system area, PA-RISC 1.1 architectural extensions were made to
speed up the processing of performance-sensitive abnormal events, such as
misses in the address translation cache (also called the TLB). Such
architectural changes are only visible to the operating system, and do
not affect any applications programs. Minor system changes have been
added to the three editions of the PA-RISC 1.1 architecture, known as
editions 1, 2 and 3, respectively, of the architecture manual.
PA-RISC 1.1 also added bi-endian support. Previously, PA-RISC 1.0 was a
consistently big endian machine, but in PA-RISC 1.1, support for little
endian was also provided by means of a mode bit.
----------------------------------
PA2.0->architecture represents the first time that user-visible
changes have been made to the core integer architecture. In addition to
support for 64-bit integer data and 64-bit flat addresses, other
user-visible changes have also been added to enhance the performance of
new user workloads. For example, Multimedia Acceleration eXtensions (MAX)
have been added to speedup multimedia processing by software running on
the main processor, rather than on separate optional hardware. Some
additional floating-point and system-level changes have also been added.
More info regarding PA.
http://cpus.hp.com/technical_references/parisc.shtml
http://www.hp.com/products1/itanium/infolibrary/information/pa-risc_illuminata.pdf
Regards,
Sung