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Re: The $$ usage in Makefile?

 
Jack_27
Advisor

The $$ usage in Makefile?

Hi,there

I found the $$ was used in the Makefile but not sure what it would do.

...
FUNCS_OBJ = FUNCS.o

################################################
#
# Build the target
user_A.sl: $$(OTHER_OBJ)$$(FUNCS_OBJ);
$(IDUX)
$(LDUXSL) $(OTHER_SUDF_OBJ) $(FUNCS_OBJ)
...

Why the FUNCS_OBJ was accessed by "$$" but not "$"?
I just think it will report the "FUNCS.o was not found" error infor.

How do you think?

Cheers
Jack
1 REPLY 1
Jose Mosquera
Honored Contributor

Re: The $$ usage in Makefile?

Hi,

Maybe if you use the "nm" command to extract the function names from this C object file you will get a useful clue:
#nm FUNCS.o

Rgds.