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08-01-2002 06:29 AM
08-01-2002 06:29 AM
Make has double suffix interference rule .cpp.o for building .o files from .cpp files. This rule looks like:
.cpp.o
$(CXX) $(CXXFLAGS) -c $<
But this rue produces .o file in the same directory where .cpp source file is located, and works only when .o and .cpp are in the same directory. Is it possible to define similiar rule, that will allow me to have source code and object files in separate directories?
Thank You in advance
Solved! Go to Solution.
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08-01-2002 06:39 AM
08-01-2002 06:39 AM
Re: Question about MAKE utility
.y.o:
$(YACC) $(YFLAGS) $<
$(CC) $(CFLAGS) -c y.tab.c
rm y.tab.c
mv y.tab.o $@
So, can you try to do:
.cpp.o
$(CXX) $(CXXFLAGS) -c $<
mkdir ./newdir
mv *.o ./newdir/
Please let me know your findings..
Regards,
Ceesjan
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08-01-2002 08:04 AM
08-01-2002 08:04 AM
Re: Question about MAKE utility
Note that Ceesjan's solution will cause you to do a rebuild of every *.cpp file every time you run make, because make will not look in the directory where the *.o files are.
Tom
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08-01-2002 08:08 AM
08-01-2002 08:08 AM
Re: Question about MAKE utility
.cpp.o:
with a colon.
A much better make is the GNU make. Binaries are available from a HP porting center or from https://www.beepz.com/personal/merijn
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08-01-2002 11:28 PM
08-01-2002 11:28 PM
Re: Question about MAKE utility
Thank you guys for your assistance.
Wojtek
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08-02-2002 12:26 AM
08-02-2002 12:26 AM
Re: Question about MAKE utility
you can try to use the following one. Looks ugly but works :-).
################################
OD = ./obj
OD_OBJS = $(OD)/test.o
OBJS = test.o
main: moveobjs $(OBJS) removeobjs
moveobjs:
cp $(OD_OBJS) . || echo ""
.c.o:
gcc -o $(OD)/$@ -c $<
removeobjs:
rm $(OBJS)
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08-02-2002 01:39 AM
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08-02-2002 05:26 AM
08-02-2002 05:26 AM
Re: Question about MAKE utility
Thanks again